Monolithic CMOS integrated circuits are well known and comprise a plurality of N-channel and P-channel MOS transistors formed in a common silicon substrate. An extremely high transistor packing density has been achieved in CMOS circuits and typically 25,000 transistors are formed on a chip less than 1 cm.sup.2. The transistors are formed by doping regions of two different conductivity types in the substrate. Usually the substrate is doped to be of N-type conductivity, the P-channel transistors being formed in the surface of the substrate and the N-channel transistors being formed in one or more P-type wells doped into the N-type substrate. The transistors are interconnected by metallisation layers so as to define well known inverters and transmission gates or other circuit arrangements.
A difficulty with CMOS circuits is that unwanted electrical conduction can occur between adjacent transistors as a consequence of the aforementioned high transistor packing density. Now, as is well known, the N-channel and P-channel transistors operate by unipolar conduction, and to prevent unipolar conduction between adjacent N and P-channel transistor locations, heavily doped guard bands are usually formed around the transistors. Also, in certain operating conditions of the circuit, an unwanted bipolar conduction can occur between the various aforementioned N and P type regions associated with an adjacent N and P channel transistor, the bipolar conduction establishing a regenerative current flow between the transistors which build up uncontrollably and which can damage the circuit. The unwanted bipolar conduction can for example become established by an input voltage to the circuit spuriously being contaminated by voltage spike which causes the input voltage to attain a transient value outside of its normal operating range, the resulting bipolar conduction establishing a regenerative current flow which rapidly and uncontrollably builds up to a maximum value determined by the supply capacity of the circuit's power supply, thereby injecting into the transistors heavy currents which can destroy the circuit. To prevent such damage to the circuit, the known CMOS circuits have been provided with voltage limiting circuits that limit the input voltages to a predetermined range in which the aforementioned bi-polar conduction does not occur, but the known voltage limiting circuits have the disadvantage of being undesirably complex and of taking up space in the circuit that would be useful for other purposes.